To schedule a meeting with Tortuga Logic at any of the following events, send an email to firstname.lastname@example.org
Tortuga Logic to co-present at Cadence CONNECT Mission Critical on Oct 13th, 2020
Tortuga’s Alric Althoff accompanied by Ryan Keshock of Edaptive Computing to present “A Structured Approach to Security Verification of DoD SoCs”
Virtual Conference: Arm DevSummit 2020 October 6–8, 2020
- Tuesday Oct. 6. 10:50 AM – 11:20 AM PDT
Tortuga Logic CTO Dr. Jason Oberg to participate in the panel “Is Your Hardware Secure in a Zero-Trust Environment?”
- Thursday, Oct 8 10:50 AM – 11:20 AM PDT
Dr. Nicole Fern to present “A Systematic Approach to Navigating the Chaos of Security”
Tortuga Logic to Present and Exhibit at SEE/MAPLD, October 4-7, 2020
Visit our virtual booth Oct. 6-8, and don’t miss Tortuga Logic’s Alric Althoff presentation “Executable Specifications for Hardware Assurance of SoCs and FPGAs”, Wednesday Oct. 7th at 2:00 PM PDT.
Virtual Hardware Security Summit | Tue, Sept 15, 2020 8:30 PM – 3:00 PM PDT
A premier event for security experts and management teams to discuss existing trends, initiatives, and challenges in hardware security. The event features insightful leadership panels and technical presentations from both private and public
industry and government.
Upcoming Webinar: Security Verification of Xilinx’s Root of Trust Leveraging Information Flow Analysis | Tue, Aug 18, 2020 12:00 PM – 1:00 PM PDT
Xilinx products are used in a wide range of applications where hardware-enabled system security is a requirement. Security for Xilinx platforms is provided by a root of trust subsystem, for which a large number of security requirements must
be verified to provide a sufficient level of assurance. This webinar will cover how Xilinx uses Tortuga Logic’s Radix to verify several root of trust security requirements more efficiently throughout the development lifecycle.
Upcoming Webinar: A New Approach to Measure Hardware Security Coverage: Wednesday, August 5, 2020 at 12:00 pm EST
This presentation will describe important industry initiatives supported by MITRE that can be effectively leveraged for measuring security coverage against common hardware weaknesses
Tortuga Logic to Virtually Present and Exhibit at the 57th Design Automation Confernce, July 20-24, 2020
Tortuga Logic to Showcase Rambus CryptoManager Root of Trust Security Verification at the RISC-V Summit, Dec 10-12, 2019
Tortuga Logic To Exhibit and Present at ARC Processor Summit in Santa Clara, CA September 19, 2019
Tortuga Logic To Attend Electronics Division Meeting in Arlington, VA September 4-5, 2019
Tortuga Logic To Host Hardware Security Webinar on August 21, 2019 at 10 AM PDT
Tortuga Logic To Attend and Speak at Rambus’ Secure Silicon IP Lunch-and Learns
- July 24, 2019 in San Diego, CA
- August 13, 2019 in Burlington, MA
- August 29, 2019 in Denver, CO
- September 19, 2019 in Orlando, FL
Tortuga Logic To Attend, Exhibit, and Present at DAC 2019 In Las Vegas, NV June 2-6, 2019
Tortuga Logic To Attend and Exhibit at MAPLD 2019 In San Diego, CA May 20-23, 2019
Tortuga Logic To Attend TAME Forum 2019 In Fairfax County, VA May 9, 2019
Tortuga Logic To Attend, Sponsor, and Present At HOST 2019 In Fairfax County, VA May 6-10, 2019
Tortuga Logic To Attend And Present At GOMACTech 2019 In Albuquerque, NM March 26-28, 2019
Tortuga Logic To Attend And Present At RISC-V Summit In Santa Clara, CA December 3-6, 2018
Tortuga Logic To Attend TAME Forum In Columbus, OH November 15, 2018
Tortuga Logic To Attend Xilinx Security Working Group (XSWG) 2018 Washington D.C. In Herndon, Virginia November 6-8, 2018
Tortuga Logic To Attend Xilinx Security Working Group (XSWG) 2018 Longmont In Longmont, Colorado October 16-17, 2018
Tortuga Logic To Attend And Host An Exhibit Booth At Arm TechCon 2018 In San Jose, CA October 16-18, 2018
Tortuga Logic To Attend Xilinx Developer Forum In Silicon Valley, CA October 1-2, 2018
Tortuga Logic To Attend And Present At September Bay Area RISC-V Meetup In Sunnyvale, CA September 12, 2018
Tortuga Logic To Attend And Demo At ARC Summit 2018 In San Jose, CA September 11, 2018
Tortuga Logic To Attend And Present At MAPLD 2018 In San Diego, CA May 24, 2018!
Tortuga Logic To Attend And Demo Latest Platforms At The Xilinx Security Working Group In Washington, DC November 7-9, 2017!
New Hardware Design Tools Eliminate Hardware Security Breaches
Tortuga Logic To Attend And Demo Latest Platforms At The Xilinx Security Working Groups In Longmont, CO October 17-19, 2017!”
Tortuga Logic To Present And Attend DAC Conference In Austin, TX On June 18th-22nd, 2017!
Tortuga Logic To Attend IoT World Conference In Santa Clara, CA On May 16th-18th, 2017!
Tortuga Logic To Attend Embedded Systems Conference In Boston, MA On May 3rd-4th, 2017!
Tortuga Logic To Attend HOST Workshop In Mclean, VA On May 1st-5th, 2017!
Tortuga Logic To Attend Trusted Microelectronics Special Topic: Field Programmable Gate Array (FPGA) Assurance Workshop In Mclean, VA. On March 1st-2nd, 2017!
Tortuga Logic To Attend Microsemi Security Forum In Arlington, VA. On March 1st, 2017!
Tortuga Logic To Attend And Present At WEST2017 At The San Diego Convention Center In San Diego, CA. On February 21-23, 2017!
Tortuga Logic To Attend RSA Conference 2017 At The Moscone Center In San Francisco, CA. On February 13-17, 2017!
Tortuga Logic To Attend And Present At Software And Supply Chain Assurance Forum In Mclean, VA On December 13-15, 2016!
Tortuga Logic To Attend And Present At MTV Conference In Austin, Texas On December 12-13, 2016!
Tortuga Logic To Attend And Present At The Xilinx Security Working Groups In Germany And France December 5-9, 2016!
Upcoming Webinar On Design For Security!
Tortuga Logic To Attend And Present At The Xilinx Security Working Group In Longmont, Colorado October 26 – 28, 2016!
Tortuga Logic To Attend At MILCOM 2016!
Tortuga Logic To Exhibit At DAC 2016
Tortuga Logic will be in attendance at DAC 2016, and will exhibit at both the OneSpin Solutions booth (#1249) and the Verific Booth (#538).
Tortuga Logic Sponsors HOST Symposium
Tortuga Logic will be in attendance at the HOST 2016 Symposium.