ARC Processor System
DesignWare ARC Processor IP provides a rich set of security options that help protect systems from evolving security threats such as IP theft and malicious attacks. When integrating an ARC Processor and adding application software, designers must ensure that the resulting end system remains secure. Tortuga Logic’s Radix-S software is an effective tool for our customers to verify that no vulnerabilities are introduced during the integration and programming of their ARC Processor-based systems.
Vice President of Marketing for IP at Synopsys
The ARC debug mode provides increased controllability and observability for both hardware and software testing; however, access to design internals poses a security risk. To ensure debug functionality can only be accessed by authorized users, ARC processors provide the option to configure secure debug features, including a locking/unlocking mechanism. Synopsys provides an example unlock module based on a simple challenge response protocol. Designers however, typically replace the example and define custom unlock logic to provide the security necessary to address specific threat models or to integrate the processor secure debug into a larger SoC secure debug design. This can initiate risk in the hardware.